Senior Staff CAD Engineer at 31 MSI - (Marvell Semiconductor Inc.) US — Austin, TX
Full job description
About Marvell
Your Team, Your Impact
As a key CAD member of Marvell Central Engineering, you will play a leading role on developing next-generation automated design flow and add-on tools. You will have the opportunity to use your extensive design and CAD knowledge to define the whole organization's design methodology and work flow.
What You Can Expect
- Develop and maintain leading-edge P&R flows addressing the needs of Marvell’s various Business Units
- Contribute to the deployment and support of these flows
- Work in collaboration with the rest of the team to ensure optimal integration inside the overall CAD platform
- Come-up with innovative solutions to ever-increasing design challenges
- Keep up with process and tool evolutions
- Interface with EDA vendors for optimal tool usage
What We're Looking For
•
Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree
- 2+ years of recent experience with Cadence Innovus.
- Proven experience with advance nodes 7nm or below tape out. Familiar with Finfet, Dual Patterning and ULV challenges.
- Solid understanding, at least at block level but preferably at SoC level of:
- Timing closure issues and ways to debug and fix them
- Floorplanning and routability issues and ways to fix them
- Power Grid design and validation
- Various Clock synthesis schemes
- SI, EM/IR, complex DRC rules
- Power intent and Multiple power domains implementation.
- High speed and low power implementation techniques/trade-offs.
- Upstream/Downstream flow correlation
- Good level of proficiency in Tcl scripting in the context of flow development
- Demonstrate good analysis and problem-solving skills. Out-of-the-box thinking
- Team player with good verbal and written communication skills
- Preferred Qualifications:
- Ability to run the following tasks is a plus:
- Gate-to-gate equivalence checking
- Parasitic Extraction
- STA
- Physical Verification (at least DRC)
- Early Rail Analysis
- Experience with implementation exploration methods
- Experience with EDA tool benchmarks
Expected Base Pay Range (USD)
129,100 - 191,030, $ per annum
Interview Integrity
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