31 MSI - (Marvell Semiconductor Inc.) US · Santa Clara, CA

Director, Design Verification at 31 MSI - (Marvell Semiconductor Inc.) US — Santa Clara, CA

Full-timeSanta Clara, CAPosted 2026-07-21Apply on Workday
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Full job description

About Marvell

Your Team, Your Impact

Custom Compute and Storage (CCS) Business Unit closely collaborates with strategic customers in the development of advanced and highly complex System-on-Chip (SOCs), from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The SOC Design team is a critical part of this group, responsible for building the most complex SOCs, integrating both internal and external IPs and driving a high quality design tape-out for the CCS products.

As part of SOC Design and Verification leadership, you will play a key role in building complex multi-chiplet SOCs for CCS product portfolio.

What You Can Expect

  • Lead DV, emulation and post silicon validation execution with zero defect mindset.
  • Define DV, emulation and post silicon validation scope.
  • Define execution timelines working closely with stakeholders.
  • Set goals, monitor, and take steps to keep the execution on track.
  • Define DV methodology and verification strategies.
  • Drive definition and implementation of DV TB architectures.
  • Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
  • Lead tool evaluation and selection.
  • Drive continuous productivity improvements through incremental and forklift changes.
  • Monitoring industry DV trends and adapting to key trends.
  • Hire, build and retain high performance engineering team.
  • Address continuous training and development needs of the team.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience or equivalent professional experience in lieu of a formal degree
  • 10+ years of experience in design engineering with focus on block level, subs-system level and SOC verification
  • Hands on experience with verification methodologies, test-bench development.
  • Strong experience in coding in scripting languages like Perl, Python, Tcl & UNIX Shell etc.
  • Strong understanding of ASIC development process & Proven ability to lead ASIC development teams.
  • Strong understanding of product development cycle of large SOCs through multiple successful product tape-outs
  • Good understanding of SoC architecture, processor cores, memory, and peripheral interfaces.
  • Excellent communication, interpersonal and presentation skills.
  • Strong cross-functional leadership skills & Cross domain knowledge to resolve with design and architecture teams
  • Highly motivated, self-driven and curiosity to learn new technologies.

Expected Base Pay Range (USD)

195,180 - 292,400, $ per annum

Interview Integrity

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