Senior Staff Analog and Mixed-Signal IC Design Engineer — Irvine, CA
Full job description
About Marvell
Your Team, Your Impact
As an Analog IC Design Senior Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.
What You Can Expect
- Seeking a Mixed Signal designer to be part of a key team designing highly sophisticated CMOS transceiver/SERDES products.
- Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.
What We're Looking For
- Strong knowledge on the deep sub-micron CMOS technologies.
- Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits.
- Knowledge and Experience on low power and high-speed design techniques.
- Excellent problem solving and analytical skills are essential.
- Strong knowledge on IC design CAD tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc.
- Lab testing skills to evaluate the prototype unit to the design specification.
- Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience.
- Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5years of experience.
- Part of a key team designing highly sophisticated CMOS transceiver/SERDES products.
- Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc.
- To meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.
- Carrying out layout activities in nanometric technologies and be able to supervise physical design.
- Able to work in the lab independently or with test engineers to characterize, debug and validate designs.
- Would be required to generate design related documents, application specifications etc. and may support customers and FAEs as needed.
- May be required to interface with digital and SOC teams to facilitate design integration and cross-functional verifications.
Expected Base Pay Range (USD)
149,500 - 221,220, $ per annum
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