Staff Software Engineer - C++, C#, Python at 31 MSI - (Marvell Semiconductor Inc.) US — Santa Clara, CA
Full job description
About Marvell
Your Team, Your Impact
Marvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central System Engineering (CSE) in Central Engineering, independent of other CE functions including DSP algorithm development, circuit design, physical design, packaging, etc., is a function team responsible of validating all Marvell HSS IPs in the lab environment and supporting all Marvell business units for fast and smooth SoC production.
What You Can Expect
- Evaluate and define the SSD firmware feature requirements.
- Design, implement and optimize SSD FW features and Common Service FW features.
- Perform failure analysis by using various tools and equipment (identify issues, duplicate problems and fix/assign the issues).
- Pilot the SSD key feature implementation, integration, and performance optimization.
- Pilot the SSD firmware’s continuous improvement or refactor.
- Work across teams/sites, which includes but not limits to: requirement analysis with architecture team, qualification strategies discussion with validation team, emergency problem solving with customer support team.
What We're Looking For
- Experience of the infrastructure software development in the area of software defined storage, or high-speed networking, or SSD/ accelerator device drivers.
- 3+ years' experience with SSD Firmware Development.
- 7+ years' experience in embedded firmware development, digital design, control systems.
- Extensive C/C++ programming experience in embedded system development.
- Hands-on experiences in the ARM based board bring-up and HW driver development.
- Experience on the algorithm and data structure design.
- Strong capability on the legacy C code learning and refactoring.
- Good design documentation and presentation capability.
- Solid knowledge of Gtest, Git, Gerrit, Python, JIRA and wiki.
- Bachelor in Electronics or Computer Systems Engineering, Master and above preferred.
Preferred:
- Experience on the SSD FTL design.
- Experience on the PCIe/NVMe protocol and NAND flash back end design.
- Experience on the embedded OS kernel design and development(uCOS, embOS, ...).
- Experience on the Windows based simulation system design.
- Experience on Linux system development environment.
Expected Base Pay Range (USD)
111,070 - 166,400, $ per annum
Interview Integrity
#LI-JT2