Cowboyspace · San Carlos, CA

FPGA Software Engineer at Cowboyspace — San Carlos, CA

Full-timeSan Carlos, CA$150,000–$200,000/yearPosted 2026-07-16Apply on Ashby

Full job description

## About the Role

We're looking for an experienced FPGA/RTL engineer to help build the digital backbone of our compute payload — the hard-real-time logic that connects high-speed image sensors to embedded compute. You'll design and own HDL for flight critical sensor interface, high speed data processing for in-orbit and ground communications, and embedded Linux running on ARM SoC's. This is active development on a live flight program with near-term launch milestones: you'll join a small team, take full ownership of workstreams from day one, and see your designs fly.

## Responsibilities

  • Design, implement, and verify HDL/RTL in SystemVerilog/Verilog for the compute payload's FPGA subsystems, from architecture through on-orbit operation
  • Develop high-speed camera sensor interfaces, including sensor clocking, configuration, register read/write control, and deterministic pixel capture pipelines
  • Develop high-throughput communication pipelines for moving compute data from orbit to the ground
  • Build memory-mapped register interfaces (AXI) between FPGA logic and embedded Linux running on ARM cores, and define the hardware/software contact with flight software engineers
  • Own timing closure, synthesis, and implementation across Zynq UltraScale+ and Versal targets using Vivado and related toolchains
  • Develop testbenches and simulation environments to verify designs before hardware, and validate on the bench with logic analyzers, oscilloscopes, and protocol analyzers
  • Support Petalinux platform bring-up, device tree configuration, and driver-level integration of FPGA peripherals with the embedded Linux stack
  • Lead board bring-up and hardware integration for new payload avionics, working closely with electrical and embedded software engineers
  • Investigate anomalies spanning the sensor-to-software chain, perform root cause analysis, and drive fixes across hardware/firmware/software boundaries
  • Document designs and interfaces, and pair with teammates to spread ownership of the FPGA function across the team
  • Contribute to build automation, regression testing, and CI for FPGA development workflows

## Basic Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • 5+ years of experience in FPGA/HDL design, including architecture, verification, synthesis, and timing closure
  • Proficiency in SystemVerilog or Verilog for production FPGA development
  • Hands-on experience with FPGA + ARM SoC platforms (e.g., Xilinx/AMD Zynq or Zynq UltraScale+) and AMD/Xilinx toolchains (Vivado, Vitis, Petalinux)
  • Experience designing high-speed digital interfaces and DDR/DMA-based datapaths
  • Experience integrating FPGA logic with embedded software, including memory-mapped register interfaces and driver-level debugging
  • Experience developing FPGA platforms for multi-gigabit data pipelines, including integrating error correction techniques to ensure stability.
  • Hands-on hardware bring-up and lab debugging experience with oscilloscopes, logic analyzers, and embedded debug tools
  • Demonstrated ability to own open-ended design problems independently and carry them from hardware

## Preferred Qualifications

  • Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
  • Experience in aerospace, defense, semiconductor, or other high-reliability development
  • Experience with image sensor interfaces (e.g., MIPI CSI-2, LVDS/SLVS, SubLVDS) or other high-bandwidth sensor front-ends
  • Familiarity with Versal ACAP architecture and Quartus toolflows
  • Experience with simulation and verification tools such as Questa/ModelSim, Xcelium, or Verilator, and with UVM or other structured verification methodologies
  • Proficiency with C/C++, Python, and TCL for bring-up, test automation, and tooling
  • Experience with hardware-in-the-loop testing and automated regression of FPGA designs
  • Familiarity with fault-tolerant design and radiation effects mitigation (SEU scrubbing, TMR, configuration memory integrity) for space applications
  • Experience thriving in fast-paced, high-ownership environments with rapid iteration cycles

### Compensation and Benefits

The salary range for this position is $150,000 – $200,000 annually. The actual base salary offered will depend on factors such as job-related skills, experience, qualifications, and internal equity.

  • Equity in Cowboy Space Corp.
  • Employees and their eligible dependents may enroll in medical, dental, and vision insurance
  • 401(k) retirement savings plan
  • Paid time off
  • 10 paid holidays per calendar year
  • Paid parental leave
  • Relocation assistance if applicable
  • Daily lunch in the office and a fully stocked kitchen with beverages and snacks

ITAR Requirements

  • Export Control Requirement: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicants must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about ITAR here.

Disclaimer

Required skills

  • linux
  • c++
  • communication
  • backbone
  • electrical engineering
  • electrical
  • python
  • continuous integration